How to output a gate signal

i have a question on how i can make Pure Data output a steady Metro clock out of one of the Gate Outs on the Patch_Sm?

I was trying something like this for example:

[loadbang] - [Toggle] - [Metro 200] - [s Gateout1 @hv_param]

Is there anything i’m missing? Maybe a Bang object after the Metro?

The metro outputs a bang, but the Gateout wants an actual 1 value.

What I’ve done so far is setup a very short automated 1/0 message event like so:

6G88Fnp

This will immediately set a 1, then 10ms later back to 0.
You may need to tweak the delay time to what suits for your specific setup.

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Thanks Dreamer! i will give that a try and see how it goes

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The patch works!
However i was never able to change the metro tempo with a Ctrl potentiometer so I ended up using [hv.lfo square] coming out of one of the CV Outs and had a potentiometer to control the frequency.
It works for clocking most of my modules.

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Nice! For a metro you have to re-bang it when changing the value. Otherwise it doesn’t know it needs to start again.

Works the same in pd afaik.

btw with [hv.lfo pulse] you can also adjust the width of the signal, which in some cases might give a better clock trigger. (some modules are picky about this)

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