General Spec Info

Hi Folks

I’m just gearing up for some daisy seed devin’ - while they arrive in the post!!

I have some question about the Seed:

  1. 32bit bus to external ram (64mb)?

  2. L1 Cache size 16+16?

  3. is the seed a generic STM32F7?

  4. FPU clock cycles for doubles

any docs on the hardware?

thanks in advance


[Edit] Answering my own question - looks like it’s a STM32H750IB

ugh - QSPI ram!!! - oh well at least it’s running at 133mhz

Yes, that is the MCU used. But QSPI is a flash storage (with memory mapped access available), not RAM. The external RAM is a normal SDRAM chip. And QSPI is a lot of pain if you want to try to run code from it (instead of the limited amount of 128kb flash), but if your patch is stored on flash it’s not a problem to use QSPI.

Hi Antisvin

Thanks for the info - that’s a HUGE relief - I was getting a bit worried about the QSPI ram (after a brief skirmish with the ESP32 - ha). This really does sound like my dream device. Yeah I can imagine the 128k flash is limiting. I’m just waiting for my stuff to arrive - it’ll be a few weeks I guess (UK) , so I’m doing all the setup ground work and device research - so I can get stuff running quickly!


And to answer the question ‘any docs on the hardware?’ -

Will get you the schematics in general.

The seed schematic.

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Hi tunagenes

Thanks for that - I did find those earlier - but it didn’t have the detailed mcu info I needed!