Thanks for the response. This a great explanation, but it still doesn’t go into details about timer callback priorities. By the way, I read everything I can find about that, but still cannot figure it out.
In the manuals of the STM32 processor you can find some information about the NVIC (Nested Vectored Interrupt Controller). That’s the thing that manages the interrupts, their priorities, etc.
There are ways to manually override the priority of interrupts by setting the priority bits for each individual interrupt, but I’m not sure if libDaisy does anything like that. I’d suspect it probably uses the default priorities, but you’ll be able to find that if you seach in the libDaisy codebase.
Here’s the programming manual where you’ll find some info about the NVIC and the priority setup in section 4.2.
In practice, you’ll need to call HAL_NVIC_SetPriority() with the IRQ number and the priority you want to assign to it. That function is part of the HAL functions, which libDaisy also uses. So, adding the right includes to your files, you should be able to just call them.
There is some additional complexity here, in that the priority bits can be split into priority groups and subpriorities. (see HAL_NVIC_SetPriorityGrouping()). Interrupts in the same group can’t interrupt each other, but if multiple interrupts are pending, the one with the higher subpriority comes first. Interrupts of different groups can interrupt each other.
Be aware that HAL functions provide ONE way to access the NVIC registers and set the priorities. CMSIS also provides functions that do this (void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)). I know, it’s confusing, but when you search for information online (or for existing calls in the libDaisy codebase) be sure to check both, as they essentially do the same - CMSIS is the general library for ARM Cortex CPU cores (not just from STM) and STM32HAL is the abstraction layer specifically for STM32 processors.
(EDIT: I’m a bit confused that the HAL functions have the priority grouping, but the lower level CMSIS function do not. I know for sure that Cortex M3 CPUs have the grouping mechanism, but maybe Cortex M7s don’t have it and the HAL functions have those arguments only to be intercompatible between CPU core types? You’ll have to do some research yourself, but feel free to come back and ask questions if you need help)