Yes, counting is as trivial as it sounds. The register can be reset before audio CB, read after it’s finished and scaled based on MCU frequency, SR and audio buffer size. I.e. 400 MHz / 48kHz SR = 8333.(3) cycles/sample, so you’ll just need to divide CYCCNT by this value to get fraction of CPU time used.
A few extra calls must be made in advance to use this, something like this should work:
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT->LAR = 0xC5ACCE55;
DWT->CYCCNT = 0;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;